Classic data-flow optimizations in compilers rely on two separate steps: analysis and transformations. Recent research however shows that combining the two into a unified pass is more effective and efficient. The purpose of this research is to extend this unified approach to the compiler code generator optimizations for embedded media processors, by combining: 1. advanced description of machine operators; 2. compiler intermediate representation based on the PSI-SSA form; and 3. semantic description of machine operators. The PSI-SSA form is an extension of the classic Static Single Assignment ( SSA) form that is used to represent predicated computations. Implementation of the research results will be based on the Open64 compiler framework and on the STMicroelectronics CLI-JIT compiler [EuroPar’2008]. Target processors for this research are the ST200 VLIW ( Lx architecture [ISCA’2000]) processors and the ARM processors. http://www.artist-embedded.org/artist/ST-Verimag-Doctoral-Student.html Tags: artist2, compiler, open64, stmicroelectronics, vliw
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